1. Field of the Invention
The present invention relates to a CCD (charge coupled device) solid-state imaging device for use in an image sensor. More particularly, the present invention relates to a method for driving a CCD solid-state imaging device capable of performing a high-speed pixel-decimated read operation (xe2x80x9cmonitoring modexe2x80x9d) for use in a high pixel density digital still camera.
2. Description of the Related Art
FIG. 1 is a plan view illustrating a structure of a secondary image sensor (CCD solid-state imaging device) which is representative of CCD-based imaging devices.
The CCD solid-state imaging device includes: a plurality of photodetector columns 11a each including a vertical array of photodetectors (photodiodes) 11; a plurality of vertical CCDs 12 each for reading signal charges generated in the photodetectors 11 along one of the photodetector columns 11a; a horizontal CCD 13 for receiving signals transferred from the vertical CCDs 12 and horizontally transferring the received signals; a charge-voltage conversion section 14 for converting signal charges from the horizontal CCD 13 into voltage signals; and an amplifier 15 for amplifying voltage signals from the charge-voltage conversion section 14. The CCD solid-state imaging device further includes vertical transfer electrodes 16 (in the illustrated example, four such electrodes are provided for implementing a 4-phase driving operation) for controlling the signal charge transfer in the vertical CCDs 12, and horizontal transfer electrodes 17 (in the illustrated example, two such electrodes are provided for implementing a 2-phase driving operation) for controlling the signal charge transfer in the horizontal CCD 13.
As a color filter arrangement for the photodetectors 11 in each photodetector column 11a, an RGB (R: red, G: green, B: blue) Bayer arrangement is employed in the illustrated example. Specifically, the photodetector columns 11a include an alternating pattern of two types of vertical photodetector arrays, with the first type of array including the photodetectors 11 of R, G, R, G, . . . , G, in this order from top to bottom, and the second type of array including the photodetectors 11 of G, B, G, B, . . . , B, in this order from top to bottom.
In the field of secondary image sensors, the pixel density (i.e., the number of pixels provided per unit area of the device) has been increasing. Particularly, current main stream digital still cameras include over two million pixels therein. A commonly-employed method for driving an imaging device such as a high pixel density digital still camera is a method which allows the user to switch between a still mode and a monitoring mode. The still mode is a mode in which data (signal charges) from all pixels (photodetectors) is read out and processed, and is selected when still images are processed, e.g., when printing out a picture that has been taken. The monitoring mode is a mode in which pixel data from all pixels, is thinned or decimated so as to use only a portion of the total pixel data, and is selected when moving images are processed, e.g., when adjusting the frame to select the object to be imaged, including the background or setting, while watching the monitor output.
The still mode operation and the monitoring mode operation will now be described.
FIG. 2 is an enlarged view of a portion of a CCD solid-state imaging device corresponding to two photodetector columns. In FIG. 2, like elements to those shown in FIG. 1 are provided with like reference numerals. The CCD solid-state imaging device includes blocking pixels 28 at the bottom of each photodetector column, each of which is covered with a light blocking film to prevent light from entering the device therethrough.
In the illustrated example, the decimation ratio in the monitoring mode is {fraction (1/7)}, i.e., only data from one out of seven pixels (corresponding to seven photodetectors 11) is used (such an operation is referred to herein as a xe2x80x9c{fraction (1/7)} decimation operationxe2x80x9d). The vertical transfer electrodes (vertical transfer gates) 16 include six different types (phases) of vertical transfer electrodes (xe2x80x9c6-phase gatesxe2x80x9d), i.e., "PHgr"V1A, "PHgr"V1B, "PHgr"V2, "PHgr"V3A, "PHgr"V3B and "PHgr"V4, and 28 such gates are used as one unit. Alternatively, when a xc2xc decimation operation is employed, the 6-phase vertical transfer electrodes (gates) are used, and 16 such gates are used as one unit. Herein, gates "PHgr"V1A, "PHgr"V1B, "PHgr"V3A and "PHgr"V3B are used for reading out signal charges from photodetectors, and the other gates "PHgr"V2 and "PHgr"V4 are used solely for signal transfer.
(Still Mode)
Referring to FIGS. 3 and 4, the still mode operation will now be described. FIG. 3 illustrates a timing chart for the various vertical transfer electrodes 16 for the vertical CCDs 12 in the still mode. FIG. 4 shows potential lines representing the respective potential states of the various vertical transfer electrodes 16 for the vertical CCDs 12 at each of the different points in a time period from t31 to t36 in FIG. 3.
The different periods referred to in FIG. 3 are defined as follows. The xe2x80x9cone horizontal periodxe2x80x9d refers to a period of time starting from a read start time at which signal charges from one row of pixels, which have been received by the horizontal CCD 13 from the vertical CCDs 12, are read out to output terminals, and ending at the following read start time at which signal charges from the next row of pixels, which have been received by the horizontal CCD 13 from the vertical CCDs 12, are read out to the output terminals. The xe2x80x9chorizontal blanking periodxe2x80x9d refers to a period of time starting from a point in time at which a clocking operation (for reading out signal charges from one row of pixels, which have been received by the horizontal CCD 13 from the vertical CCDs 12, to the output terminals) is terminated, and ending at a point in time at which a clocking operation (for reading out signal charges from the next row of pixels, which have been received by the horizontal CCD 13 from the vertical CCDs 12, to the output terminals) is initiated. The xe2x80x9cone vertical transfer cyclexe2x80x9d refers to a period of time in which signal charge, which have been received by the vertical CCDs 12, is transferred vertically by one packet (one step) (from the potential state of time t31 to the potential state of time t32 in FIG. 4). The term xe2x80x9cpacketxe2x80x9d used herein refers to a potential well which is controlled by each vertical transfer electrode 16 for the vertical CCDs 12. In other words, a xe2x80x9cpacketxe2x80x9d is a receptacle for receiving a signal charge which is generated in a photodetector (corresponding to a low potential portion of the potential line shown next to xe2x80x9ct31xe2x80x9d in FIG. 4, for example). Each signal charge which has been read out from a photodetector is input to a corresponding packet, and is stored therein until it is transferred to the next packet.
In FIG. 3, xe2x80x9cTsxe2x80x9d denotes one vertical transfer cycle in the still mode. FIG. 4 shows potential lines representing the respective potential states of the various vertical transfer electrodes 16 of one of the vertical CCDs 12 along the line a-axe2x80x2 in FIG. 2. In order to read out signals from all of the R, G and B pixels, signals of two different color components are read out for each of two successive fields (A Field and B Field).
First, in the A Field and at time t31, R signal charges (┌2┘, ┌4┘, ┌6┘, . . . ) from the pixels (photodetectors 11) of pixel numbers 2, 4, 6, . . . (hereinafter, xe2x80x9cpixels #2, #4, #6, . . .xe2x80x9d), are readout from the photodetectors 11 to the corresponding packets of the vertical CCD 12 (FIG. 4) under the control of the electrodes "PHgr"V1A and "PHgr"V1B. Simultaneous with this read operation, G signal charges (FIG. 2) from the adjacent column of pixels next to the column of the pixels #2, #4, #6, . . . , are read out to the adjacent vertical CCD 12 (not shown in FIG. 2) next to the vertical CCD 12 along the line a-axe2x80x2.
The signal charges ┌2┘, ┌4┘, ┌6┘, . . . , read out at time t31 are transferred vertically under the control of the 6-phase gates "PHgr"V1A to "PHgr"V4 ("PHgr"V1A, "PHgr"V1B, "PHgr"V2, "PHgr"V3A, "PHgr"V3B and "PHgr"V4) within the horizontal blanking period without being mixed with one another, thereby resulting in the potential states as represented by the potential line at time t32 in FIG. 4. By repeating such an operation, all the signal charges, which have been read out from the pixels #2, #4, #6, . . . , at time t31, are read out to the horizontal CCD 13.
Similarly, in the B Field, G signal charges (B signal charges for the adjacent photodetector column) ┌1┘, ┌3┘, ┌5┘ , . . . , are readout from the pixels #1, #3, #5, . . . , by the electrodes "PHgr"V3A and "PHgr"V3B, and are transferred vertically under the control of the 6-phase gates "PHgr"VIA to "PHgr"V4.
Thus, in the still mode, a common drive timing signal is applied to the electrodes "PHgr"V1A and "PHgr"V1B and to the electrodes "PHgr"V3A and "PHgr"V3B, and signals of two different color components are read out in different patterns for two successive fields. As a result, with the A Field and B Field, all of the R, G and B signals are read out.
(Monitoring Mode)
FIG. 5 illustrates a timing chart for the various vertical transfer electrodes 16 for the vertical CCDs 12 in the monitoring mode. FIG. 6 shows potential lines representing the respective potential states of the various vertical transfer electrodes 16 for the vertical CCDs 12 at each of the different points in the time period from t51 to t55 in FIG. 5. In FIG. 5, xe2x80x9cTmxe2x80x9d denotes one vertical transfer cycle in the monitoring mode, which has a length that is xc2xc of the vertical transfer cycle Ts in the still mode shown in FIG. 3.
In the monitoring mode, signals from pixels of the same color are read out for each field. First, at time t51, an R signal ┌14┘(a G signal for the adjacent photodetector column) from the pixel #14 corresponding to "PHgr"V1A is read out to a corresponding packet of the vertical CCD 12. The amount of data of the R (G) signal ┌14┘ which is read out for the A Field in the monitoring mode is {fraction (1/7)} of the amount of data read out for the A Field in the still mode because there are six "PHgr"V1B gates and only one "PHgr"V1A gate.
Then, at time t52, the signal ┌14┘ is transferred by one packet (one step) by the 6-phase gates "PHgr"V1A to "PHgr"V4. Simultaneously, a G signal ┌7┘ (a B signal for the adjacent photodetector column) from the pixel #7 is read out by the corresponding gate "PHgr"V3A. As in the case of the R (G) signal ┌14┘, the amount of data of the G (B) signal ┌7┘ is {fraction (1/7)} of the amount of data read out for the B Field in the still mode. Then, at time t53, the R (G) signal ┌14┘ and the G (B) signal ┌14┘ are transferred to the next packets, respectively. By performing such an operation, signals of R, G and B color components are read out in one field.
As shown by the potential lines shown next to xe2x80x9ct51xe2x80x9d and xe2x80x9ct52xe2x80x9d in FIG. 6, the signals (┌7┘ and ┌14┘) of two different color components are stored in the respective packets and are arranged with a 2-packet (4-pixel) or 3-packet (6-pixel) interval therebetween. Seven packets corresponding to 14 pixels are used as one unit.
Then, in a horizontal blanking period, the signal from the pixel G (B) is transferred by four packets (or four steps) (corresponding to eight pixels) to the horizontal CCD 13 at a high speed. Simultaneously, the R (G) signal ┌14┘, which is to be received by the horizontal CCD 13 in the next horizontal blanking period, is transferred to a packet near the horizontal CCD 13 (time t54).
In the following horizontal blanking period, the R (G) signal ┌14┘ is transferred by three packets (or three steps) (corresponding to six pixels) to the horizontal CCD 13. Simultaneously, the G (B) signal ┌21┘, which is to be read out to the horizontal CCD 13 in the next horizontal blanking period, is transferred to a packet near the horizontal CCD 13.
As described above, the vertical signal transfer operation is repeatedly performed in four steps, in three steps, in four steps, in three steps, and so on. Thus, the signals, which are arranged at intervals with two or three empty packets being interposed between the two signals being transferred, can be continuously taken out from the horizontal CCD 13 with no empty packet(s) being interposed therebetween.
The still mode and the monitoring mode can be compared as follows. With the horizontal transfer time being equal, the total data for one screen is read out in two fields in the still mode, whereas the total data is read out in xc2xc of one field in the monitoring mode by performing a {fraction (1/7)} decimation operation. Thus, in the monitoring mode, data can be processed at an overall frame rate that is {fraction (1/7)} of that in the still mode.
For example, where a 3-million pixel imaging device is operated at a clock frequency of 18 MHz, 4.4 million clocks per frame, the amount of time required for taking out data of one screen (xe2x80x9cframe ratexe2x80x9d) is about xc2xc second in the still mode and about {fraction (1/29)} second in the monitoring mode. The frame rate in the monitoring mode is comparable to that of the NTSC TV standard ({fraction (1/30)} second). Thus, it is possible to display smoothly moving images in the monitoring mode.
The monitoring mode realizes a continuous read operation for necessary photodetector signals from each horizontal CCD based on the combination of the xe2x80x9cvertical decimated read operationxe2x80x9d and the xe2x80x9cvertical CCD multi-step signal transfer in the horizontal blanking periodxe2x80x9d. The number of steps (packets) over which signals are transferred in the xe2x80x9cvertical CCD multi-step signal transfer in the horizontal blanking periodxe2x80x9d (xe2x80x9cthe vertical transfer step numberxe2x80x9d) varies depending upon the degree of decimation, and is 2 for a xc2xc decimation operation, a combination of 2 and 3 for a ⅕ decimation operation, 3 for a {fraction (1/6 )} decimation operation, a combination of 3 and 4 for a {fraction (1/7)} decimation operation, 4 for a xe2x85x9 decimation operation, and soon. The degree of decimation is determined by the total number of pixels in the imaging device, the number of pixels required for displaying moving images, and the frame rate.
As mentioned above, the pixel density of an imaging device such as a digital still camera has been increasing. Accordingly, the degree of decimation in the monitoring mode, i.e., the vertical transfer step number, has also increased. However, the frame rate required for the monitoring mode does not change with the increase in the number of pixels. Therefore, it is necessary to increase the vertical transfer step number in a horizontal blanking period. In order to increase the vertical transfer step number in a horizontal blanking period, which is a fixed period of time, it is necessary to shorten the amount of time required for vertically transferring a signal in one step from that of the still mode, and thus to increase the vertical transfer frequency.
FIG. 7 illustrates the relationship between the amount of signal processed by the vertical CCD and the driving frequency for the vertical transfer electrode. Herein, it is assumed that the amount of signal processed by the vertical CCD per packet for one vertical transfer cycle in the still mode is 100%. As shown in FIG. 7, the amount of signal processed by the vertical CCD is reduced as the frequency is increased.
Thus, where the vertical transfer frequency in the monitoring mode is greater than that in the still mode, it is not possible in the monitoring to achieve the same amount of signal processed by the vertical CCD as that in the still mode. As a result, signals read out from the photodetectors overflow in a random manner to empty packets in the adjacent vertical CCD during a vertical high-speed transfer operation in the monitoring mode, thereby causing degradation in the image quality such as unevenness or color mixing.
In the prior art, in order to address such a problem, the proportion of area per unit pixel cell that is occupied by the photodetectors or the vertical CCD has been designed so that the amount of signal processed by the vertical CCD is always greater than the amount of signal processed by the photodetector even in the monitoring mode, in which the amount of signal processed by the vertical CCD is reduced due to the frequency characteristics. The image quality degradation has been prevented by such an optimization method. However, with such a method, where the amount of signal processed by the vertical CCD is increased, it is necessary to increase the proportion of area per unit pixel cell that is occupied by the vertical CCD, which presents a drawback in increasing the pixel density.
Problems which present possible causes for the reduction in the amount of signal to be processed along with the increase in the vertical driving frequency include the reduction in the vertical CCD transfer efficiency and the bluntness of the driving signal waveform due to a gate load. These problems should be addressed. However, when the pixel density is further increased in the future, the vertical transfer frequency and the gate load will further increase, in which case the reduction in the amount of signal processed by the vertical CCD in the monitoring mode will be more serious.
According to one aspect of this invention, there is provided a method for driving a CCD solid-state imaging device. The CCD solid-state imaging device includes: a plurality of photodetector columns each including a vertical array of photodetectors; a plurality of vertical CCDs each including a plurality of packets each receiving a signal charge generated in one of the photodetectors; and a horizontal CCD provided along a horizontal direction for successively receiving the signal charges from the vertical CCDs. The method drives the CCD solid-state imaging device in a monitoring mode where the signal charges from all the photodetectors are decimated so as to use only the signal charges from some of the photodetectors. The method includes the steps of: reading a first signal charge from any one of the photodetectors into a corresponding first packet of a corresponding one of the vertical CCDs; dividing the first signal charge in the first packet into smaller portions and placing one or more of the signal charge portions of the first signal charge into one or more second empty packets of the corresponding one of the vertical CCDs; and vertically transferring the signal charge portions in the first and second packets by the total number of the first and second packets.
In one embodiment of the invention, the signal charge portions in the first and second packets are transferred to the horizontal CCD through the transfer step, and the transferred signal charge portions are mixed together at the horizontal CCD so as to reproduce the first signal charge.
In one embodiment of the invention, an amount of signal processed by the first and second packets of one of the vertical CCDs is equal to or greater than an amount of signal processed by one packet in a still mode in which the signal charges from all the photodetectors are processed without being decimated.
In one embodiment of the invention, a vertical transfer frequency of one of the vertical CCDs is greater than a vertical transfer frequency in a still mode in which the signal charges from all the photodetectors are processed without being decimated.
As already discussed in the related art section, where the vertical transfer frequency of the vertical CCD in the monitoring mode is greater than that in the still mode, the amount of signal to be processed per vertical CCD packet in the monitoring mode is lower than that in the still mode. Moreover, since a decimated read operation is performed in the monitoring mode, there are a number of empty packets between packets containing photodetector signals (see the potential line shown next to xe2x80x9ct53xe2x80x9d in FIG. 6). These empty packets are transferred to the horizontal CCD as signal-containing packets in the horizontal blanking period.
In view of this, according to the present invention, the operation in the monitoring mode is as follows. Before the vertical CCD driving operation is switched to a high-speed driving operation after signals are read out from the photodetectors to the vertical CCDs, i.e., before the amount of signal processed per vertical CCD packet is reduced and random overflow occurs, a signal charge from one of the photodetectors is divided into smaller portions and distributed among a plurality of vertical CCD packets. As a result, the amount of signal to be processed per packet is reduced, thereby eliminating the random signal overflow in the high-speed driving operation.
In the present application, the high-speed driving operation of the vertical CCD in the monitoring mode means a driving operation with a vertical transfer cycle shorter than that in the still mode, i.e., a vertical transfer frequency greater than that in the still mode.
After a signal charge from one of the photodetectors is divided into smaller portions and distributed among a plurality of vertical CCD packets, the portions of the divided signal charge are added together at the horizontal CCD through a vertical CCD multi-step signal transfer, thereby reproducing the original photodetector signal.
Thus, the invention described herein makes possible the advantages of providing a method for driving a CCD solid-state imaging device in which it is possible to suppress degradation of the image quality due to the reduction in the processing capacity of the vertical CCD, which occurs when a vertical signal transfer operation is performed at a high frequency in a monitoring mode.
This and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.